FE2.1 — USB 2.0 7-Port MTT Hub Controller

FE2.1 is a highly integrated, high-quality, high-performance, low-power-consumption, yet low-cost solution for USB 2.0 High Speed 7-Port Hub.

MTT 架構

The chip adopts Multiple Transaction Translator (MTT) architecture to explore the maximum possible throughput. Six non-periodic transaction buffers are used to minimize potential traffic jamming. The whole design is based on state-machine-control to reduce the response delay time; no micro controller is used in this chip

客製化 EEPROM

FE2.1 allows EEPROM configuration for customizing Vendor ID, Product ID, Device Release Number, Removable or Non-Removable Downstream Devices configuration, Serial Number, and the number of downstream ports.

品質保證

The whole chip is covered by Test Scan Chain – even on high-speed (480MHz) modules. Built-In-Self-Test mode exercises all high-, full-, and low-speed Analog Front End (AFE) components at the packaging and testing stages.

FE2.1 產品簡介PDF icon

聯絡業務 📩

FE2.1 in LQFP48 package Full size image.FE2.1 in LQFP48 package

產品規格

封裝 USB 埠 尺寸 耐溫規格 Transaction Translator (TT)
LQFP-48 7 7x7 mm 商業用規格,
寬溫規格[*]		 Multiple
LQFP-64 7 10x10 mm 商業用規格 Multiple

商業用規格: 0°C - 70°C
寬溫規格: -40°C, 25°C, 85°C 溫度驗證

產品特色

  • Fully compliant with Universal Serial Bus Specification Revision 2.0 (USB 2.0)
    • Upstream Facing Port supports High-Speed (480MHz) and Full-Speed (12MHz) modes
    • 7 Downstream Facing Ports support High-Speed (480MHz), Full-Speed (12MHz), and Low-Speed (1.5MHz) modes
  • Low power consumption
    • 155 mA when 7 Downstream Facing Ports enabled in High-Speed mode
    • 66 mA when 1 Downstream Facing Port enabled in High-Speed mode
  • Integrated USB 2.0 Transceivers
  • Integrated upstream 1.5KΩ pull-up, downstream 15KΩ pull-down, and serial resistors
  • Integrated 5V to 3.3V and 1.8V regulators
  • Integrated Power-On-Reset circuit
  • Integrated 12MHz Oscillator with feedback resistor, and crystal load capacitor
  • Integrated 12MHz-to-480MHz Phase Lock Loop (PLL)
  • Comprehensive Port Indicators support (Green and Amber LED)
  • Support Self-Powered Mode only
  • Multiple Transaction Translators (MTT)
    • One TT for each downstream port
    • Alternate Interface 0 for Single-TT, and Alternate Interface 1 for Multiple-TT
    • Each TT can handle 64 periodic Start-Split transactions, 32 periodic Complete-Split transactions, and 6 none-periodic transactions
  • Board configuration options
    • Ganged or Individual Power Control Mode select
    • Global, Multiple Gangs, or Individual Over-Current Protection Mode select
    • Removable or Non-Removable Downstream Devices configuration
    • Number of Downstream Ports
  • EEPROM configuration options
    • Vendor ID, Product ID, and Device Release Number
    • Number of Downstream Ports
    • Removable or Non-Removable Downstream Devices configuration
    • Serial Number
    • Number of Downstream Ports