FE1.1 — USB 2.0 4-Port MTT Hub Controller

FE1.1 is a highly integrated, high-quality, high-performance, low-power-consumption, yet low-cost solution for USB 2.0 High Speed 4-Port Hub.

Advanced MTT Architecture

The chip adopts Multiple Transaction Translator (MTT) architecture to explore the maximum possible throughput. Six non-periodic transaction buffers are used to minimize potential traffic jamming. The whole design is based on state-machine-control to reduce the response delay time; no micro controller is used in this chip

Quality Guaranteed

The whole chip is covered by Test Scan Chain – even on high-speed (480MHz) modules. Built-In-Self-Test mode exercises all high-, full-, and low-speed Analog Front End (AFE) components at the packaging and testing stages.

Low Power Consumption

Achieved by using 0.18μm technology and comprehensive power/clock control. Most part of the chip will not be clocked unless needed.

Product Specifications

Package Port Count Body Size Grade Transaction Translator
LQFP-48 4 7x7 mm Commercial Grade, Extended Temperature Grade[*] Multiple
QFN-24 4 4x4 mm Commercial Grade, Extended Temperature Grade[*] Multiple
QFN-48 4 6x6 mm Commercial Grade Multiple

Commercial Grade: 0°C - 70°C
Extended Temperature Range: Certified for -40°C, 25°C, 85°C

Features

  • Fully compliant with Universal Serial Bus Specification Revision 2.0 (USB 2.0)
    • Upstream Facing Port supports High-Speed (480MHz) and Full-Speed (12MHz) modes
    • 4 Downstream Facing Ports support High-Speed (480MHz), Full-Speed (12MHz), and Low-Speed (1.5MHz) modes
  • Integrated USB 2.0 Transceivers
  • Integrated upstream 1.5KΩ pull-up, downstream 15KΩ pull-down, and serial resistors
  • Integrated 5V to 3.3V and 1.8V regulators
  • Integrated Power-On-Reset circuit
  • Integrated 12MHz Oscillator with feedback resistor, and crystal load
  • Integrated 12MHz-to-480MHz Phase Lock Loop (PLL)
  • Comprehensive Port Indicators support (Green and Amber LED)
  • Multiple Transaction Translators (MTT)
    • One TT for each downstream port
    • Alternate Interface 0 for Single-TT, and Alternate Interface 1 for Multiple-TT
    • Each TT could handle 64 periodic Start-Split transactions, 32 periodic Complete-Split transactions, and 6 none-periodic transactions
  • Automatic self-power status monitoring
    • Automatic re-enumeration when Self- Powered switching to Bus-Powered
  • Board configuration options
    • Ganged or Individual Power Control Mode select
    • Global or Individual Over-Current Detection Mode select
    • Removable or Non-Removable Downstream Devices configuration