FE12.1 — USB 2.0 HSIC 7-Port MTT Hub Controller

FE12.1 is a High Speed 7-Port Hub Controller with HSIC (High-Speed Inter-Chip) upstream connectivity and 7 Downstream Ports, including 5 USB 2.0 ports and 2 HSIC ports. It is designed for embedded USB applications where low-power, high-performance, and low-costs are key requiremets.

Optimized for Circuit Board Layout

HSIC has been designed to replace a standard USB PHY and USB Cable with an interface that is optimized for circuit board layout. A USB chip-to-chip interconnection uses a 2-signal (Strobe, Data) source-synchronous serial interface.

Battery Charging Configuration

FE12.1 could be optionally configured to support Charging Downstream Ports (which are only enabled on standard USB ports) as defined by USB-IF Battery Charging Specification. When enabling this feature, a USB hub could be transformed into a charging station for Universal Charging Solution-compliant battery-based portable devices.

Quality Guaranteed

The whole chip is covered by Test Scan Chain – even on high-speed (480MHz) modules. Special Build-In-Self-Test mode is designed to exercise HSIC ports and all high-, full-, and low-speed Analog Front End (AFE) components at the packaging and testing stages.

Product Brief for FE12.1PDF icon

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FE12.1 in WQFN-24 package Full size image.FE12.1 in WQFN-24 package

Product Specifications

Package Port Count Body Size Grade Transaction Translator
WQFN-24 7 4x4 mm Commercial Grade,
Extended Temperature Grade[*]		 Multiple

Commercial Grade: 0°C - 70°C
Extended Temperature Range: Certified for -40°C, 25°C, 85°C

Features

  • Fully compliant with High-Speed Inter-Chip USB Electrical Specification Version 1.0 (HSIC)
    • Upstream Facing Port supports High-Speed (480MHz)
    • 2 Downstream Facing Ports (Port 5,6) support High-Speed (480MHz)
  • Fully compliant with Universal Serial Bus Specification Revision 2.0 (USB 2.0)
    • 5 Downstream Facing Ports (Port 1,2,3,4,7) support High-Speed (480MHz), Full-Speed (12MHz), and Low-Speed (1.5MHz) modes
  • Compliant with Universal Charging Solution, and USB Battery Charging Specification 1.1/1.2
  • USB Link Power Management (LPM) support
  • Integrated HSIC Transceivers
  • Integrated USB 2.0 Transceivers
  • Integrated downstream 15KΩ pull-down, and serial resistors
  • Integrated 5V to 3.3V and 1.8V regulators
  • Integrated Power-On-Reset circuit
  • Integrated 12MHz Oscillator with feedback resistor, and crystal load capacitor
  • Integrated 12MHz-to-480MHz Phase Lock Loop (PLL)
  • Integrated Portable Device detection circuitry for UCS supporting
  • Multiple Transaction Translators (MTT)
    • One TT for each downstream port
    • Alternate Interface 0 for Single-TT, and Alternate Interface 1 for Multiple-TT
    • Each TT can handle 64 periodic Start-Split transactions, 32 periodic Complete-Split transactions, and 6 none- periodic transactions
  • Support Self-Powered Mode only
  • Board configure support of portable device detection mechanism for Universal Charging Solution on 5 Downstream Ports (USB 2.0)