FE18.1 — USB 2.0 High Speed 4x4 Hub Controller

FE18.1 High Speed 4x4 Hub is a USB 2.0 Hub Controller with 4 Upstream Facing Ports and 4 Downstream Facing Ports; designers can narrow it down to 2, 3, or 4 Upstream Facing Ports, and select one at a time.

Multiple USB Hosts

FE18.1 is designed for implementations that use multiple USB Hosts sharing the same set of USB devices. The key advantages of FE18.1 are streamlined components and simplified PCB layout, which benefit the systems with enhanced signal quality and integrity.

Quality Guaranteed

The whole chip is covered by Test Scan Chain – even on high speed (480MHz) modules. Built-In-Self-Test mode exercises all high-, full-, and low-speed Analog Front End (AFE) components at the packaging and testing stages.

Battery Charging Configuration

FE18.1 could be optionally configured to support Charging Downstream Ports as defined by USB-IF Battery Charging Specification. When enabling this feature, a USB hub could be transformed into a charging station for Universal Charging Solution-compliant battery-based portable devices.

Product Brief for FE18.1PDF icon

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FE18.1 in QFN-48 package Full size image.FE18.1 in QFN-48 package

Product Specifications

Package Port Count Body Size Grade Transaction Translator
QFN-48 4 5x5 mm Commercial Grade Multiple

Commercial Grade: 0°C - 70°C

Features

  • Fully compliant with Universal Serial Bus Specification Revision 2.0 (USB 2.0)
    • Upstream Facing Port supports High-Speed (480MHz) and Full-Speed (12MHz) modes
    • 4 Downstream Facing Ports support High-Speed (480MHz), Full-Speed (12MHz), and Low-Speed (1.5MHz) modes
  • Compliant with Universal Charging Solution, and USB Battery Charging Specification 1.1/1.2
  • USB Link Power Management (LPM) support
  • Integrated USB 2.0 Transceivers
  • Integrated upstream 1.5KΩ pull-up, downstream 15KΩ pull-down, and serial resistors
  • Integrated 5V to 3.3V and Core Power regulators
  • Integrated Power-On-Reset circuit
  • Integrated 12MHz Oscillator with feedback resistor, and crystal load capacitor
  • Integrated 12MHz-to-480MHz Phase Lock Loop (PLL)
  • Integrated Portable Device detection circuitry for UCS supporting
  • Multiple Transaction Translators (MTT)
    • One TT for each downstream port
    • Alternate Interface 0 for Single-TT, and Alternate Interface 1 for Multiple-TT
    • Each TT can handle 64 periodic Start-Split transactions, 32 periodic Complete-Split transactions, and 6 non-periodic transactions
  • Automatic self-power status monitoring
    • Automatic re-enumeration when Self- Powered switching to Bus-Powered
  • Board configure options
    • Button or MCU Mode select
    • Number of Upstream Ports
  • Upstream Port Indicators support
    • Four LED output pins; one pin for each upstream port status indicator